The clock frequency of APB is determined through a long sequence of prescaling and selecting as shown in the image below:

APB clock source flow

Note: In this post, external oscillator and PLL are used to select SYSCLK.

Term Explanation
HSE External clock frequency
PLLM PLL division factor
PLLN PLL multiplication factor
PLLP SYSCLK division factor
HPRE AHB prescaler
PPREx APBx prescaler

PLL

$$tex fVCO = \frac{HSE}{PLLM} * PLLN tex$$

SYSCLK

$$tex SYSCLK = \frac{fVCO}{PLLP} tex$$

AHB clock

$$tex HCLK = \frac{SYSCLK}{HPRE} tex$$

APB clock

$$tex PCLKx = \frac{HCLK}{PPREx} tex$$

An example

Lets consider an external oscillator of frequency 16MHz. Lets say we need a SYSCLK and HCLK of 168MHz.

>> HPRE = 1

This leaves us with,

$$tex \frac{PLLN}{PLLM * PLLP} = \frac{SYSCLK}{HSE} tex$$
$$tex \frac{PLLN}{PLLM * PLLP} = 10.5 tex$$

We can settle with the following values:

>> PLLN = 336
>> PLLM = 16
>> PLLP = 2  

Now, for a PCLKx of 42MHz, we can pick,

>> PPREx = 4